Dmitrii Drozdov, Sandeep Patil, Victor Dubinin, Valeriy Vyatkin. Formal verification of cyber-physical automation systems modelled with timed block diagrams. In IEEE 25th International Symposium on Industrial Electronics, ISIE 2016, Santa Clara, CA, USA, June 8-10, 2016. pages 316-321, IEEE, 2016. [doi]
Abstract is missing.