Power estimation technique for DSP architectures

Yaseer A. Durrani, Teresa Riesgo. Power estimation technique for DSP architectures. Digital Signal Processing, 19(2):213-219, 2009. [doi]

@article{DurraniR09,
  title = {Power estimation technique for DSP architectures},
  author = {Yaseer A. Durrani and Teresa Riesgo},
  year = {2009},
  doi = {10.1016/j.dsp.2008.09.005},
  url = {http://dx.doi.org/10.1016/j.dsp.2008.09.005},
  tags = {architecture},
  researchr = {https://researchr.org/publication/DurraniR09},
  cites = {0},
  citedby = {0},
  journal = {Digital Signal Processing},
  volume = {19},
  number = {2},
  pages = {213-219},
}