Design & Benchmark of Single Bit & Multi Bit Sequential Elements in 65nm for Low Standby Power Consumption

Shashank Neeraj Dwivedi, Ashish Kumar Seth, Anuj Grover. Design & Benchmark of Single Bit & Multi Bit Sequential Elements in 65nm for Low Standby Power Consumption. In 2020 24th International Symposium on VLSI Design and Test (VDAT), Bhubaneswar, India, July 23-25, 2020. pages 1-6, IEEE, 2020. [doi]

Abstract

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