An FPGA run-time parameterisable Log-Normal Random Number Generator

Pedro Echeverría, David B. Thomas, Marisa López-Vallejo, Wayne Luk. An FPGA run-time parameterisable Log-Normal Random Number Generator. In Roger F. Woods, Katherine Compton, Christos-Savvas Bouganis, Pedro C. Diniz, editors, Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings. Volume 4943 of Lecture Notes in Computer Science, pages 219-230, Springer, 2008. [doi]

@inproceedings{EcheverriaTLL08,
  title = {An FPGA run-time parameterisable Log-Normal Random Number Generator},
  author = {Pedro Echeverría and David B. Thomas and Marisa López-Vallejo and Wayne Luk},
  year = {2008},
  doi = {10.1007/978-3-540-78610-8_22},
  url = {http://dx.doi.org/10.1007/978-3-540-78610-8_22},
  researchr = {https://researchr.org/publication/EcheverriaTLL08},
  cites = {0},
  citedby = {0},
  pages = {219-230},
  booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings},
  editor = {Roger F. Woods and Katherine Compton and Christos-Savvas Bouganis and Pedro C. Diniz},
  volume = {4943},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-540-78609-2},
}