Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks

Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan 0001, Ravi R. Iyer, Dennis Sylvester, David T. Blaauw, Reetuparna Das. Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks. In Murali Annavaram, Timothy M. Pinkston, Babak Falsafi, editors, 45th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2018, Los Angeles, CA, USA, June 1-6, 2018. pages 383-396, IEEE Computer Society, 2018. [doi]

@inproceedings{EckertWWSISBD18,
  title = {Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks},
  author = {Charles Eckert and Xiaowei Wang and Jingcheng Wang and Arun Subramaniyan 0001 and Ravi R. Iyer and Dennis Sylvester and David T. Blaauw and Reetuparna Das},
  year = {2018},
  url = {http://dl.acm.org/citation.cfm?id=3276577},
  researchr = {https://researchr.org/publication/EckertWWSISBD18},
  cites = {0},
  citedby = {0},
  pages = {383-396},
  booktitle = {45th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2018, Los Angeles, CA, USA, June 1-6, 2018},
  editor = {Murali Annavaram and Timothy M. Pinkston and Babak Falsafi},
  publisher = {IEEE Computer Society},
  isbn = {978-1-5386-5984-7},
}