Exploiting the Use of VHDL Specifications in the AGENDA High-Level Synthesis Environment

George Economakos, George K. Papakonstantinou. Exploiting the Use of VHDL Specifications in the AGENDA High-Level Synthesis Environment. In 24th EUROMICRO 98 Conference, Engineering Systems and Software for the Next Decade, 25-27 August 1998, Vesteras, Sweden. pages 10091-10098, IEEE Computer Society, 1998. [doi]

Abstract

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