A 12 Bit 1.6 GS/s BiCMOS 2×2 Hierarchical Time-Interleaved Pipeline ADC

Manar El-Chammas, Xiaopeng Li, Shigenobu Kimura, Kenneth Maclean, Jake Hu, Mark Weaver, Matthew Gindlesperger, Scott Kaylor, Robert Payne, Charles K. Sestok, William Bright. A 12 Bit 1.6 GS/s BiCMOS 2×2 Hierarchical Time-Interleaved Pipeline ADC. J. Solid-State Circuits, 49(9):1876-1885, 2014. [doi]

@article{El-ChammasLKMHWGKPSB14,
  title = {A 12 Bit 1.6 GS/s BiCMOS 2×2 Hierarchical Time-Interleaved Pipeline ADC},
  author = {Manar El-Chammas and Xiaopeng Li and Shigenobu Kimura and Kenneth Maclean and Jake Hu and Mark Weaver and Matthew Gindlesperger and Scott Kaylor and Robert Payne and Charles K. Sestok and William Bright},
  year = {2014},
  doi = {10.1109/JSSC.2014.2315624},
  url = {http://dx.doi.org/10.1109/JSSC.2014.2315624},
  researchr = {https://researchr.org/publication/El-ChammasLKMHWGKPSB14},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {49},
  number = {9},
  pages = {1876-1885},
}