Low Power SER Tolerant Design to Mitigate Single Event Transients in Nanoscale Circuits

Praveen Elakkumanan, Kishan Prasad, Ramalingam Sridhar. Low Power SER Tolerant Design to Mitigate Single Event Transients in Nanoscale Circuits. J. Low Power Electronics, 1(2):182-193, 2005. [doi]

@article{ElakkumananPS05,
  title = {Low Power SER Tolerant Design to Mitigate Single Event Transients in Nanoscale Circuits},
  author = {Praveen Elakkumanan and Kishan Prasad and Ramalingam Sridhar},
  year = {2005},
  doi = {10.1166/jolpe.2005.022},
  url = {http://dx.doi.org/10.1166/jolpe.2005.022},
  tags = {design},
  researchr = {https://researchr.org/publication/ElakkumananPS05},
  cites = {0},
  citedby = {0},
  journal = {J. Low Power Electronics},
  volume = {1},
  number = {2},
  pages = {182-193},
}