A 3.7mW 3MHz bandwidth 4.5GHz digital fractional-N PLL with -106dBc/Hz In-band noise using time amplifier based TDC - researchr publication authors

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Ahmed Elkholy, Tejasvi Anand, Woo-seok Choi, Amr Elshazly, Pavan Kumar Hanumolu. A 3.7mW 3MHz bandwidth 4.5GHz digital fractional-N PLL with -106dBc/Hz In-band noise using time amplifier based TDC. In Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014. pages 1-2, IEEE, 2014. [doi]

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