Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement

John M. Emmert, Dinesh Bhatia. Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement. In Wayne Luk, Peter Y. K. Cheung, Manfred Glesner, editors, Field-Programmable Logic and Applications, 7th International Workshop, FPL 97, London, UK, September 1-3, 1997, Proceedings. Volume 1304 of Lecture Notes in Computer Science, pages 141-150, Springer, 1997.

@inproceedings{EmmertB97,
  title = {Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement},
  author = {John M. Emmert and Dinesh Bhatia},
  year = {1997},
  researchr = {https://researchr.org/publication/EmmertB97},
  cites = {0},
  citedby = {0},
  pages = {141-150},
  booktitle = {Field-Programmable Logic and Applications, 7th International Workshop, FPL  97, London, UK, September 1-3, 1997, Proceedings},
  editor = {Wayne Luk and Peter Y. K. Cheung and Manfred Glesner},
  volume = {1304},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-63465-7},
}