A 16-bit 2.0-ps Resolution Two-Step TDC in 0.18-µm CMOS Utilizing Pulse-Shrinking Fine Stage With Built-In Coarse Gain Calibration

Ryuichi Enomoto, Tetsuya Iizuka, Takehisa Koga, Toru Nakura, Kunihiro Asada. A 16-bit 2.0-ps Resolution Two-Step TDC in 0.18-µm CMOS Utilizing Pulse-Shrinking Fine Stage With Built-In Coarse Gain Calibration. IEEE Trans. VLSI Syst., 27(1):11-19, 2019. [doi]

Authors

Ryuichi Enomoto

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Tetsuya Iizuka

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Takehisa Koga

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Toru Nakura

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Kunihiro Asada

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