Area Minimisation of IC Power/Ground Nets by Topology Optimisation

Karl-Heinz Erhard, Frank M. Johannes. Area Minimisation of IC Power/Ground Nets by Topology Optimisation. In Arne Halaas, Peter B. Denyer, editors, VLSI 91, Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22 August, 1991. Volume A-1 of IFIP Transactions, pages 119-126, North-Holland, 1991.

@inproceedings{ErhardJ91,
  title = {Area Minimisation of IC Power/Ground Nets by Topology Optimisation},
  author = {Karl-Heinz Erhard and Frank M. Johannes},
  year = {1991},
  researchr = {https://researchr.org/publication/ErhardJ91},
  cites = {0},
  citedby = {0},
  pages = {119-126},
  booktitle = {VLSI 91, Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22 August, 1991},
  editor = {Arne Halaas and Peter B. Denyer},
  volume = {A-1},
  series = {IFIP Transactions},
  publisher = {North-Holland},
  isbn = {0-444-89019-X},
}