Yoav Etsion, Dror G. Feitelson. L1 Cache Filtering Through Random Selection of Memory References. In 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007. pages 235-244, IEEE Computer Society, 2007. [doi]
@inproceedings{EtsionF07, title = {L1 Cache Filtering Through Random Selection of Memory References}, author = {Yoav Etsion and Dror G. Feitelson}, year = {2007}, doi = {10.1109/PACT.2007.44}, url = {http://doi.ieeecomputersociety.org/10.1109/PACT.2007.44}, tags = {caching}, researchr = {https://researchr.org/publication/EtsionF07}, cites = {0}, citedby = {0}, pages = {235-244}, booktitle = {16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007}, publisher = {IEEE Computer Society}, }