A 10-Bit 300-MS/s Pipelined ADC With Digital Calibration and Digital Bias Generation

Bing-Nan Fang, Jieh-Tsorng Wu. A 10-Bit 300-MS/s Pipelined ADC With Digital Calibration and Digital Bias Generation. J. Solid-State Circuits, 48(3):670-683, 2013. [doi]

@article{FangW13,
  title = {A 10-Bit 300-MS/s Pipelined ADC With Digital Calibration and Digital Bias Generation},
  author = {Bing-Nan Fang and Jieh-Tsorng Wu},
  year = {2013},
  doi = {10.1109/JSSC.2012.2233332},
  url = {http://doi.ieeecomputersociety.org/10.1109/JSSC.2012.2233332},
  researchr = {https://researchr.org/publication/FangW13},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {48},
  number = {3},
  pages = {670-683},
}