Modular high-throughput and low-latency sorting units for FPGAs in the Large Hadron Collider

Amin Farmahini Farahani, Anthony E. Gregerson, Michael J. Schulte, Katherine Compton. Modular high-throughput and low-latency sorting units for FPGAs in the Large Hadron Collider. In IEEE 9th Symposium on Application Specific Processors, SASP 2011, San Diego, CA, USA, June 5-6, 2011. pages 38-45, IEEE Computer Society, 2011. [doi]

@inproceedings{FarahaniGSC11,
  title = {Modular high-throughput and low-latency sorting units for FPGAs in the Large Hadron Collider},
  author = {Amin Farmahini Farahani and Anthony E. Gregerson and Michael J. Schulte and Katherine Compton},
  year = {2011},
  doi = {10.1109/SASP.2011.5941075},
  url = {http://doi.ieeecomputersociety.org/10.1109/SASP.2011.5941075},
  researchr = {https://researchr.org/publication/FarahaniGSC11},
  cites = {0},
  citedby = {0},
  pages = {38-45},
  booktitle = {IEEE 9th Symposium on Application Specific Processors, SASP 2011, San Diego, CA, USA, June 5-6, 2011},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4577-1211-1},
}