An 8-bit systolic AES architecture for moderate data rate applications

Sheikh Muhammad Farhan, Shoab Ahmed Khan, Habibullah Jamal. An 8-bit systolic AES architecture for moderate data rate applications. Microprocessors and Microsystems, 33(3):221-231, 2009. [doi]

Authors

Sheikh Muhammad Farhan

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Shoab Ahmed Khan

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Habibullah Jamal

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