FPGA Technology Mapping for Power Minimization - researchr publication authors

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Amir H. Farrahi, Majid Sarrafzadeh. FPGA Technology Mapping for Power Minimization. In Reiner W. Hartenstein, Michal Servít, editors, Field-Programmable Logic, Architectures, Synthesis and Applications, 4th International Workshop on Field-Programmable Logic and Applications, FPL 94, Prague, Czech Republic, September 7-9, 1994, Proceedings. Volume 849 of Lecture Notes in Computer Science, pages 66-77, Springer, 1994.

This author has not been identified. Look up 'Amir H. Farrahi' in GoogleThis author has not been identified. Look up 'Majid Sarrafzadeh' in Google

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