Amir H. Farrahi, Majid Sarrafzadeh. FPGA Technology Mapping for Power Minimization. In Reiner W. Hartenstein, Michal Servít, editors, Field-Programmable Logic, Architectures, Synthesis and Applications, 4th International Workshop on Field-Programmable Logic and Applications, FPL 94, Prague, Czech Republic, September 7-9, 1994, Proceedings. Volume 849 of Lecture Notes in Computer Science, pages 66-77, Springer, 1994.
@inproceedings{FarrahiS94:0,
title = {FPGA Technology Mapping for Power Minimization},
author = {Amir H. Farrahi and Majid Sarrafzadeh},
year = {1994},
researchr = {https://researchr.org/publication/FarrahiS94%3A0},
cites = {0},
citedby = {0},
pages = {66-77},
booktitle = {Field-Programmable Logic, Architectures, Synthesis and Applications, 4th International Workshop on Field-Programmable Logic and Applications, FPL 94, Prague, Czech Republic, September 7-9, 1994, Proceedings},
editor = {Reiner W. Hartenstein and Michal Servít},
volume = {849},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-58419-6},
}