Optimization of analog IC test structures

Eric Felt, Alberto L. Sangiovanni-Vincentelli. Optimization of analog IC test structures. In 14th IEEE VLSI Test Symposium (VTS 96), April 28 - May 1, 1996, Princeton, NJ, USA. pages 48-53, IEEE Computer Society, 1996. [doi]

@inproceedings{FeltS96,
  title = {Optimization of analog IC test structures},
  author = {Eric Felt and Alberto L. Sangiovanni-Vincentelli},
  year = {1996},
  url = {http://csdl.computer.org/comp/proceedings/vts/1996/7304/00/73040048abs.htm},
  tags = {optimization, testing},
  researchr = {https://researchr.org/publication/FeltS96},
  cites = {0},
  citedby = {0},
  pages = {48-53},
  booktitle = {14th IEEE VLSI Test Symposium (VTS 96),  April 28 - May 1, 1996, Princeton, NJ, USA},
  publisher = {IEEE Computer Society},
}