Increasing FPGA Accelerators Memory Bandwidth With a Burst-Friendly Memory Layout

Corentin Ferry, Tomofumi Yuki, Steven Derrien, Sanjay V. Rajopadhye. Increasing FPGA Accelerators Memory Bandwidth With a Burst-Friendly Memory Layout. IEEE Trans. on CAD of Integrated Circuits and Systems, 42(5):1546-1559, May 2023. [doi]

@article{FerryYDR23,
  title = {Increasing FPGA Accelerators Memory Bandwidth With a Burst-Friendly Memory Layout},
  author = {Corentin Ferry and Tomofumi Yuki and Steven Derrien and Sanjay V. Rajopadhye},
  year = {2023},
  month = {May},
  doi = {10.1109/TCAD.2022.3201494},
  url = {https://doi.org/10.1109/TCAD.2022.3201494},
  researchr = {https://researchr.org/publication/FerryYDR23},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {42},
  number = {5},
  pages = {1546-1559},
}