Ricardo Filipe, Shady Issa, Paolo Romano 0002, João Pedro Barreto 0002. Stretching the capacity of hardware transactional memory in IBM POWER architectures. In Jeffrey K. Hollingsworth, Idit Keidar, editors, Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2019, Washington, DC, USA, February 16-20, 2019. pages 107-119, ACM, 2019. [doi]
Abstract is missing.