CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator

David J. Foley, Michael P. Flynn. CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator. J. Solid-State Circuits, 36(3):417-423, 2001. [doi]

@article{FoleyF01,
  title = {CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator},
  author = {David J. Foley and Michael P. Flynn},
  year = {2001},
  doi = {10.1109/4.910480},
  url = {https://doi.org/10.1109/4.910480},
  researchr = {https://researchr.org/publication/FoleyF01},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {36},
  number = {3},
  pages = {417-423},
}