Configuring an Embedded Neuromorphic Coprocessor Using a RISC-V Chip for Enabling Edge Computing Applications

Evelina Forno, Andrea Spitale, Enrico Macii, Gianvito Urgese. Configuring an Embedded Neuromorphic Coprocessor Using a RISC-V Chip for Enabling Edge Computing Applications. In 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2021, Singapore, Singapore, December 20-23, 2021. pages 328-332, IEEE, 2021. [doi]

@inproceedings{FornoSMU21,
  title = {Configuring an Embedded Neuromorphic Coprocessor Using a RISC-V Chip for Enabling Edge Computing Applications},
  author = {Evelina Forno and Andrea Spitale and Enrico Macii and Gianvito Urgese},
  year = {2021},
  doi = {10.1109/MCSoC51149.2021.00055},
  url = {https://doi.org/10.1109/MCSoC51149.2021.00055},
  researchr = {https://researchr.org/publication/FornoSMU21},
  cites = {0},
  citedby = {0},
  pages = {328-332},
  booktitle = {14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2021, Singapore, Singapore, December 20-23, 2021},
  publisher = {IEEE},
  isbn = {978-1-6654-3860-5},
}