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Hardware Accelerator zur Simulation pulscodierter Neuronaler Netze

Gerald Frank, Norbert Bilau, Georg Hartmann. Hardware Accelerator zur Simulation pulscodierter Neuronaler Netze. In Gerhard Sagerer, Stefan Posch, Franz Kummert, editors, Mustererkennung 1995, 17. DAGM-Symposium, Bielefeld, 13.-15. September 1995, Proceedings. Informatik Aktuell, pages 194-201, Springer, 1995.

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