Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance

Matthias Függer, Attila Kinali, Christoph Lenzen, Ben Wiederhake. Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance. In 24th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2018, Vienna, Austria, May 13-16, 2018. pages 68-77, IEEE Computer Society, 2018. [doi]

@inproceedings{FuggerKLW18,
  title = {Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance},
  author = {Matthias Függer and Attila Kinali and Christoph Lenzen and Ben Wiederhake},
  year = {2018},
  doi = {10.1109/ASYNC.2018.00025},
  url = {https://doi.org/10.1109/ASYNC.2018.00025},
  researchr = {https://researchr.org/publication/FuggerKLW18},
  cites = {0},
  citedby = {0},
  pages = {68-77},
  booktitle = {24th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2018, Vienna, Austria, May 13-16, 2018},
  publisher = {IEEE Computer Society},
  isbn = {978-1-5386-5883-3},
}