Side-channel leakage on silicon substrate of CMOS cryptographic chip

Daisuke Fujimoto, Daichi Tanaka, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Shivam Bhasin, Jean-Luc Danger. Side-channel leakage on silicon substrate of CMOS cryptographic chip. In 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2013, Arlington, VA, USA, May 6-7, 2014. pages 32-37, IEEE, 2014. [doi]

@inproceedings{FujimotoTMNHHBD14,
  title = {Side-channel leakage on silicon substrate of CMOS cryptographic chip},
  author = {Daisuke Fujimoto and Daichi Tanaka and Noriyuki Miura and Makoto Nagata and Yu-ichi Hayashi and Naofumi Homma and Shivam Bhasin and Jean-Luc Danger},
  year = {2014},
  doi = {10.1109/HST.2014.6855564},
  url = {http://dx.doi.org/10.1109/HST.2014.6855564},
  researchr = {https://researchr.org/publication/FujimotoTMNHHBD14},
  cites = {0},
  citedby = {0},
  pages = {32-37},
  booktitle = {2013 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2013, Arlington, VA, USA, May 6-7, 2014},
  publisher = {IEEE},
}