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LOMOS: A Power-Efficient Topology for CMOS Logic Gate Design

Salma Gabr, Sameh Ibrahim. LOMOS: A Power-Efficient Topology for CMOS Logic Gate Design. In 32nd IEEE International Conference on Electronics, Circuits and Systems, ICECS 2025, Marrakech, Morocco, November 17-19, 2025. pages 1-4, IEEE, 2025. [doi]

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