Sri Harsha Gade, Praveen Kumar, Sujay Deb. A Pre-RTL floorplanner tool for automated CMP design space exploration with thermal awareness. In 20th International Symposium on VLSI Design and Test, VDAT 2016, Guwahati, India, May 24-27, 2016. pages 1-6, IEEE, 2016. [doi]
@inproceedings{GadeKD16, title = {A Pre-RTL floorplanner tool for automated CMP design space exploration with thermal awareness}, author = {Sri Harsha Gade and Praveen Kumar and Sujay Deb}, year = {2016}, doi = {10.1109/ISVDAT.2016.8064876}, url = {https://doi.org/10.1109/ISVDAT.2016.8064876}, researchr = {https://researchr.org/publication/GadeKD16}, cites = {0}, citedby = {0}, pages = {1-6}, booktitle = {20th International Symposium on VLSI Design and Test, VDAT 2016, Guwahati, India, May 24-27, 2016}, publisher = {IEEE}, isbn = {978-1-5090-1422-4}, }