Modeling of glitch effects in FPGA based arithmetic circuits

Altaf Abdul Gaffar, Jonathan A. Clarke, George A. Constantinides. Modeling of glitch effects in FPGA based arithmetic circuits. In George A. Constantinides, Wai-Kei Mak, Phaophak Sirisuk, Theerayod Wiangtong, editors, 2006 IEEE International Conference on Field Programmable Technology, FPT 2006, Bangkok, Thailand, December 13-15, 2006. pages 349-352, IEEE, 2006. [doi]

@inproceedings{GaffarCC06a,
  title = {Modeling of glitch effects in FPGA based arithmetic circuits},
  author = {Altaf Abdul Gaffar and Jonathan A. Clarke and George A. Constantinides},
  year = {2006},
  doi = {10.1109/FPT.2006.270345},
  url = {http://dx.doi.org/10.1109/FPT.2006.270345},
  researchr = {https://researchr.org/publication/GaffarCC06a},
  cites = {0},
  citedby = {0},
  pages = {349-352},
  booktitle = {2006 IEEE International Conference on Field Programmable Technology, FPT 2006, Bangkok, Thailand, December 13-15, 2006},
  editor = {George A. Constantinides and Wai-Kei Mak and Phaophak Sirisuk and Theerayod Wiangtong},
  publisher = {IEEE},
  isbn = {0-7803-9728-2},
}