Finite-Point Gate Model for Fast Timing and Power Analysis

Dinesh Ganesan, Alexander V. Mitev, Janet Meiling Wang, Yu Cao. Finite-Point Gate Model for Fast Timing and Power Analysis. In 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA. pages 657-662, IEEE Computer Society, 2008. [doi]

Abstract

Abstract is missing.