2 column-parallel readout cyclic ADC, having 50% reduced slew rate requirement due to feed-forward spike eliminator

Saikrishna Ganta, Alfredo Tomasini, Ajay Taparia, Taehee Cho, Mandar Kulkarni, Ozan Erdogan. 2 column-parallel readout cyclic ADC, having 50% reduced slew rate requirement due to feed-forward spike eliminator. In nd European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016. pages 173-176, IEEE, 2016. [doi]

Abstract

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