Bikram Garg, Ashish Agrawal, Rajeev Sehgal, Amarpal Singh, Manish Khanna. Partitioning, floor planning, detailed placement and routing techniques for schematic generation of analog netlist. In 2008 East-West Design & Test Symposium, EWDTS 2008, Lviv, Ukraine, October 9-12, 2008. pages 379-382, IEEE, 2008. [doi]
Abstract is missing.