Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs

Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo. Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs. IEEE Trans. VLSI Syst., 28(4):914-925, 2020. [doi]

@article{GarnicaLH20,
  title = {Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs},
  author = {Oscar Garnica and Juan Lanchares and José Ignacio Hidalgo},
  year = {2020},
  doi = {10.1109/TVLSI.2019.2961782},
  url = {https://doi.org/10.1109/TVLSI.2019.2961782},
  researchr = {https://researchr.org/publication/GarnicaLH20},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {28},
  number = {4},
  pages = {914-925},
}