Neural Network Compiler for Parallel High-Throughput Simulation of Digital Circuits

Ignacio Gavier, Joshua Russell, Devdhar Patel, Edward A. Rietman, Hava T. Siegelmann. Neural Network Compiler for Parallel High-Throughput Simulation of Digital Circuits. In IEEE International Parallel and Distributed Processing Symposium, IPDPS 2023, St. Petersburg, FL, USA, May 15-19, 2023. pages 613-623, IEEE, 2023. [doi]

@inproceedings{GavierRPRS23,
  title = {Neural Network Compiler for Parallel High-Throughput Simulation of Digital Circuits},
  author = {Ignacio Gavier and Joshua Russell and Devdhar Patel and Edward A. Rietman and Hava T. Siegelmann},
  year = {2023},
  doi = {10.1109/IPDPS54959.2023.00067},
  url = {https://doi.org/10.1109/IPDPS54959.2023.00067},
  researchr = {https://researchr.org/publication/GavierRPRS23},
  cites = {0},
  citedby = {0},
  pages = {613-623},
  booktitle = {IEEE International Parallel and Distributed Processing Symposium, IPDPS 2023, St. Petersburg, FL, USA, May 15-19, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-3766-2},
}