Neural Network Compiler for Parallel High-Throughput Simulation of Digital Circuits

Ignacio Gavier, Joshua Russell, Devdhar Patel, Edward A. Rietman, Hava T. Siegelmann. Neural Network Compiler for Parallel High-Throughput Simulation of Digital Circuits. In IEEE International Parallel and Distributed Processing Symposium, IPDPS 2023, St. Petersburg, FL, USA, May 15-19, 2023. pages 613-623, IEEE, 2023. [doi]

Abstract

Abstract is missing.