Feng Ge, P. Jain, Ken Choi. Ultra-low power and high speed design and implementation of AES and SHA1 hardware cores in 65 nanometer CMOS technology. In 2009 IEEE International Conference on Electro/Information Technology, EIT 2009, Windsor, Ontario, Canada, June 7-9, 2009. pages 405-410, IEEE, 2009. [doi]
@inproceedings{GeJC09,
title = {Ultra-low power and high speed design and implementation of AES and SHA1 hardware cores in 65 nanometer CMOS technology},
author = {Feng Ge and P. Jain and Ken Choi},
year = {2009},
doi = {10.1109/EIT.2009.5189651},
url = {http://dx.doi.org/10.1109/EIT.2009.5189651},
tags = {design},
researchr = {https://researchr.org/publication/GeJC09},
cites = {0},
citedby = {0},
pages = {405-410},
booktitle = {2009 IEEE International Conference on Electro/Information Technology, EIT 2009, Windsor, Ontario, Canada, June 7-9, 2009},
publisher = {IEEE},
isbn = {978-1-4244-3355-1},
}