Novel Low Overhead Post-Silicon Self-Correction Technique for Parallel Prefix Adders Using Selective Redundancy and Adaptive Clocking

Swaroop Ghosh, Kaushik Roy. Novel Low Overhead Post-Silicon Self-Correction Technique for Parallel Prefix Adders Using Selective Redundancy and Adaptive Clocking. IEEE Trans. VLSI Syst., 19(8):1504-1507, 2011. [doi]

@article{GhoshR11,
  title = {Novel Low Overhead Post-Silicon Self-Correction Technique for Parallel Prefix Adders Using Selective Redundancy and Adaptive Clocking},
  author = {Swaroop Ghosh and Kaushik Roy},
  year = {2011},
  doi = {10.1109/TVLSI.2010.2051169},
  url = {http://dx.doi.org/10.1109/TVLSI.2010.2051169},
  tags = {redundancy},
  researchr = {https://researchr.org/publication/GhoshR11},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {19},
  number = {8},
  pages = {1504-1507},
}