Performance space modeling for hierarchical synthesis of analog integrated circuits - researchr publication authors

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Georges G. E. Gielen, Trent McConaghy, Tom Eeckelaert. Performance space modeling for hierarchical synthesis of analog integrated circuits. In William H. Joyner Jr., Grant Martin, Andrew B. Kahng, editors, Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005. pages 881-886, ACM, 2005. [doi]

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