Performance space modeling for hierarchical synthesis of analog integrated circuits

Georges G. E. Gielen, Trent McConaghy, Tom Eeckelaert. Performance space modeling for hierarchical synthesis of analog integrated circuits. In William H. Joyner Jr., Grant Martin, Andrew B. Kahng, editors, Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005. pages 881-886, ACM, 2005. [doi]

@inproceedings{GielenME05,
  title = {Performance space modeling for hierarchical synthesis of analog integrated circuits},
  author = {Georges G. E. Gielen and Trent McConaghy and Tom Eeckelaert},
  year = {2005},
  doi = {10.1145/1065579.1065809},
  url = {http://doi.acm.org/10.1145/1065579.1065809},
  tags = {modeling, e-science},
  researchr = {https://researchr.org/publication/GielenME05},
  cites = {0},
  citedby = {0},
  pages = {881-886},
  booktitle = {Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005},
  editor = {William H. Joyner Jr. and Grant Martin and Andrew B. Kahng},
  publisher = {ACM},
  isbn = {1-59593-058-2},
}