A genetic algorithm based heuristic technique for power constrained test scheduling in core-based SOCs

Chandan Giri, Soumojit Sarkar, Santanu Chattopadhyay. A genetic algorithm based heuristic technique for power constrained test scheduling in core-based SOCs. In IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007. pages 320-323, IEEE, 2007. [doi]

Abstract

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