Jeffrey Goeders, Steven J. E. Wilton. Signal-Tracing Techniques for In-System FPGA Debugging of High-Level Synthesis Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems, 36(1):83-96, 2017. [doi]
@article{GoedersW17,
title = {Signal-Tracing Techniques for In-System FPGA Debugging of High-Level Synthesis Circuits},
author = {Jeffrey Goeders and Steven J. E. Wilton},
year = {2017},
doi = {10.1109/TCAD.2016.2565204},
url = {http://dx.doi.org/10.1109/TCAD.2016.2565204},
researchr = {https://researchr.org/publication/GoedersW17},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {36},
number = {1},
pages = {83-96},
}