Process variations aware area efficient negative bit-line voltage scheme for improving write ability of SRAM in nanometer technologies - researchr publication

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Ankur Goel, Rohit K. Sharma, A. K. Gupta. Process variations aware area efficient negative bit-line voltage scheme for improving write ability of SRAM in nanometer technologies. IET Circuits, Devices & Systems, 6(1):45-51, 2012. [doi]

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