Back Annotation in High Speed Asynchronous Design

Pankaj Golani, Peter A. Beerel. Back Annotation in High Speed Asynchronous Design. In Vassilis Paliouras, Johan Vounckx, Diederik Verkest, editors, Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings. Volume 3728 of Lecture Notes in Computer Science, pages 227-236, Springer, 2005. [doi]

@inproceedings{GolaniB05,
  title = {Back Annotation in High Speed Asynchronous Design},
  author = {Pankaj Golani and Peter A. Beerel},
  year = {2005},
  doi = {10.1007/11556930_24},
  url = {http://dx.doi.org/10.1007/11556930_24},
  tags = {design},
  researchr = {https://researchr.org/publication/GolaniB05},
  cites = {0},
  citedby = {0},
  pages = {227-236},
  booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings},
  editor = {Vassilis Paliouras and Johan Vounckx and Diederik Verkest},
  volume = {3728},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-29013-3},
}