A Comparator With Reduced Delay Time in 65-nm CMOS for Supply Voltages Down to 0.65 V

Bernhard Goll, Horst Zimmermann. A Comparator With Reduced Delay Time in 65-nm CMOS for Supply Voltages Down to 0.65 V. IEEE Trans. on Circuits and Systems, 56-II(11):810-814, 2009. [doi]

@article{GollZ09,
  title = {A Comparator With Reduced Delay Time in 65-nm CMOS for Supply Voltages Down to 0.65 V},
  author = {Bernhard Goll and Horst Zimmermann},
  year = {2009},
  doi = {10.1109/TCSII.2009.2030357},
  url = {http://dx.doi.org/10.1109/TCSII.2009.2030357},
  researchr = {https://researchr.org/publication/GollZ09},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {56-II},
  number = {11},
  pages = {810-814},
}