A Comparator With Reduced Delay Time in 65-nm CMOS for Supply Voltages Down to 0.65 V

Bernhard Goll, Horst Zimmermann. A Comparator With Reduced Delay Time in 65-nm CMOS for Supply Voltages Down to 0.65 V. IEEE Trans. on Circuits and Systems, 56-II(11):810-814, 2009. [doi]

Abstract

Abstract is missing.