Power analysis methodology for secure circuits

Kamil Gomina, Jean-Baptiste Rigaud, Philippe Gendrier, Philippe Candelier, Assia Tria. Power analysis methodology for secure circuits. In Lukás Sekanina, Görschwin Fey, Jaan Raik, Snorre Aunet, Richard Ruzicka, editors, 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2013, Karlovy Vary, Czech Republic, April 8-10, 2013. pages 102-107, IEEE Computer Society, 2013. [doi]

@inproceedings{GominaRGCT13,
  title = {Power analysis methodology for secure circuits},
  author = {Kamil Gomina and Jean-Baptiste Rigaud and Philippe Gendrier and Philippe Candelier and Assia Tria},
  year = {2013},
  doi = {10.1109/DDECS.2013.6549797},
  url = {http://doi.ieeecomputersociety.org/10.1109/DDECS.2013.6549797},
  researchr = {https://researchr.org/publication/GominaRGCT13},
  cites = {0},
  citedby = {0},
  pages = {102-107},
  booktitle = {16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2013, Karlovy Vary, Czech Republic, April 8-10, 2013},
  editor = {Lukás Sekanina and Görschwin Fey and Jaan Raik and Snorre Aunet and Richard Ruzicka},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4673-6135-4},
}