Lei Gong, Chao Wang, Xi Li 0003, Huaping Chen, Xuehai Zhou. MALOC: A Fully Pipelined FPGA Accelerator for Convolutional Neural Networks With All Layers Mapped on Chip. IEEE Trans. on CAD of Integrated Circuits and Systems, 37(11):2601-2612, 2018. [doi]
@article{GongWLCZ18,
title = {MALOC: A Fully Pipelined FPGA Accelerator for Convolutional Neural Networks With All Layers Mapped on Chip},
author = {Lei Gong and Chao Wang and Xi Li 0003 and Huaping Chen and Xuehai Zhou},
year = {2018},
doi = {10.1109/TCAD.2018.2857078},
url = {https://doi.org/10.1109/TCAD.2018.2857078},
researchr = {https://researchr.org/publication/GongWLCZ18},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {37},
number = {11},
pages = {2601-2612},
}