Asymmetric underlapped FinFET based robust SRAM design at 7nm node

A. Arun Goud, Rangharajan Venkatesan, Anand Raghunathan, Kaushik Roy. Asymmetric underlapped FinFET based robust SRAM design at 7nm node. In Wolfgang Nebel, David Atienza, editors, Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015. pages 659-664, ACM, 2015. [doi]

Abstract

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