Partitioning logic circuits to maximize fault resolution

Ayee Goundan, John P. Hayes. Partitioning logic circuits to maximize fault resolution. In Donald J. Humcke, J. Michael Galey, Stephen A. Szygenda, Pat O. Pistilli, Nitta P. Dooner, Judith G. Brinsfield, J. S. Olila, editors, Proceedings of the 13th Design Automation Conference, DAC '76, San Francisco, California, USA, June 28-30, 1976. pages 271-277, ACM, 1976. [doi]

Abstract

Abstract is missing.