Reducing Sampling Clock Jitter to Improve SNR Measurement of A/D Converters in Production Test

Shalabh Goyal, Abhijit Chatterjee, Mike Atia. Reducing Sampling Clock Jitter to Improve SNR Measurement of A/D Converters in Production Test. In 11th European Test Symposium (ETS 2006), 21-24 May 2006, Southhampton, UK. pages 165-172, IEEE Computer Society, 2006. [doi]

Abstract

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